For example, let's consider the addition of the two BCD digits 5 and 3:
Now consider the sum of 5 and 8:
The sum is 11012 = 13, but this result should be correctly
represented as 0001 0011 in BCD notation. Fortunately, there is a simple
way to find the correct result. We add 6
to the digit sum if it exceeds 9. Let's examine the following cases:
In both cases, by adding six we obtain the correct answer in BCD. This observation is critical to the design of a BCD adder, as we shall see in the next subsection.
Figure 5.27 gives a block diagram implementation for a BCD adder. The
first row of full adders implements a conventional 4-bit binary adder. The
second row provides the capability to add 01102 when the sum obtained by
the first row exceeds 9
Here is how it works. The adders of the second row
add the carry-out bit to the sum bits S2 and S1. Carry-out
should be asserted in cases in which we need to add the correction factor.
What are these cases?
The AND gates labeled A1 and A2 detect the conditions under which the first-level sum matches the patterns 11XX2 and 1X1X2. These are exactly the cases in which this sum exceeds 9. When carry-out is asserted, the XOR gate and the adders in the second row effectively add 01102 to the first row's sum.
There is one further case to consider. The correction factor should also be applied whenever the first-row sum exceeds 15. We saw such an example with the sum of 9 and 7 above. This case is easy to detect: the carry-out of the first-row adders will be asserted.
Thus the sum exceeds 9 if either the first-row carry-out is asserted, or the sum matches the pattern 11XX2, or the sum matches the pattern 1X1X2. These are precisely the inputs to the OR gate that computes the BCD carry-out.
A BCD adder requires over 50% more hardware than a comparable binary adder. Since faster binary adders are now available, it is no surprise that they have replaced BCD adders in almost all applications.
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